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Thomas Schäfer authored
Due to HW design errors in rev2, some signals must be reconfigured to avoid malfunction or possible electrical damage. - Setup UART3 RTS/CTS lines as GPIOs as polarity has been swapped on rev2 - Make sure to set GPIO1_IO12 (USB1_OTG_PWR) in input mode and remove usb0 port from u-boot device tree to avoid conflicting drivers when external host is attached. Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
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