1. 09 Oct, 2020 1 commit
  2. 06 Oct, 2020 1 commit
    • Yadviga Grigoryeva's avatar
      pitx: mipi dsi: set video_pll1 clock source to 27MHz osc · 71dc5060
      Yadviga Grigoryeva authored and Dmitry Petrov's avatar Dmitry Petrov committed
      Fot dcss graphics input IMX8MQ_VIDEO_PLL1_REF_SEL is added
      to mipi dsi clocks and its parent is set to 27mhz osc.
      Otherwise it was set to 25mhz and caused glmark2 flickering
      on single-channel lvds panel ampire am-1280800n4tzqw-t03h.
      IMX8MQ_VIDEO_PLL1_REF_SEL already is set to 27Mhz for lcdif input.
  3. 05 Oct, 2020 1 commit
  4. 02 Oct, 2020 2 commits
    • Yadviga Grigoryeva's avatar
      Set EN gpio for lvds bgidge after setting mipi dsi clock · bb90ffc5
      Yadviga Grigoryeva authored and Dmitry Petrov's avatar Dmitry Petrov committed
      I had to move ti_sn_bridge_configure from bridge_pre_enable to bridge_enable call
      and add setting gpio EN to HIGH to ti_sn_bridge_configure before internal bridge's reset.
      This makes possible to set gpio EN to HIGH when mipi dsi clock is already run after 10ms delay.
      Sequence of running bridges routines: lvds pre-enable, mipi dsi pre-enable, lvds enable, mipi dsi enable. Mipi clocks are set in mipi dsi pre-enable routine.
    • Dmitry Petrov's avatar
      defconfig: enable USB_TEST · 9e2596f1
      Dmitry Petrov authored
  5. 01 Oct, 2020 4 commits
    • Richard Liu's avatar
      MA-17341-2 [#imx-2211] Fix kernel panic when do stop on android · 463882d0
      Richard Liu authored and Edgar Cherkasov's avatar Edgar Cherkasov committed
      There is kernel panic when stop android or kill surfaceflinger
      after enable framebuffer tile compression on 8mq board.
      The root cause of the issue is dcss driver not api to receive
      ts fd, gpu driver will set the ts_dma_buf in _SetVidMemMetadata(),
      dcss driver get the ts buffer physical address from ts_dma_buf,
      when stop android framebuffer and matched ts buffer will free,
      previous ts_dma_buf get from ts_fd will be invalid, when dcss
      driver use this ts_dma_buf will cause problem. It is a common
      issue, if Linux Weston do the similar stop should also meet
      the same panic issue.
      Keep a reference for ts_dma_buf in _SetVidMemMetadata(),
      decrease the reference in _dmabuf_release() can avoid the
      panic issue.
      Kernel panic log:
      [   41.007431] kernel BUG at drivers/gpu/drm/drm_gem.c:154!
      [   41.139375] Call trace:
      [   41.141824]  drm_gem_object_init+0xb8/0xbc
      [   41.145920]  drm_gem_cma_prime_import_sg_table+0x84/0xdc
      [   41.151233]  drm_gem_prime_import_dev+0xe8/0x194
      [   41.160036]  dcss_plane_atomic_set_base+0x31c/0x3d0
      [   41.164915]  dcss_plane_atomic_update+0x450/0x46c
      [   41.164923]  drm_atomic_helper_commit_planes+0x130/0x31c
      [   41.182255]  dcss_drm_atomic_commit_tail+0xcc/0x150
      [   41.187139]  dcss_commit_work+0x10/0x1c
      [   41.197322]  process_one_work+0x2d8/0x580
      [   41.201333]  worker_thread+0x28c/0x518
      [   41.205085]  kthread+0x14c/0x15c
      [   41.208316]  ret_from_fork+0x10/0x18
      Change-Id: I385851b436d1fead1131ce25f496bdd5d3d14264
      Signed-off-by: default avatarRichard Liu <xuegang.liu@nxp.com>
      (cherry picked from commit 9ef46bda523088bfba51b7432acd2c1e21e547d5)
    • Richard Liu's avatar
      MA-17341 [#imx-2211] Remove ts_address code to keep align with Linux · 5343beb4
      Richard Liu authored and Edgar Cherkasov's avatar Edgar Cherkasov committed
      Android pass ts_address to dcss to fix kernel panic issue
      reported in ticket MA-12928, this fix solution is not formal.
      Remove ts_address code to keep align with Linux, if android
      still meet panic issue for corner case we need check root
      cause and do formal fix.
      Change-Id: I04a6294f237e0c1ed5544dce1dc13e5a6ac232ab
      Signed-off-by: default avatarRichard Liu <xuegang.liu@nxp.com>
      (cherry picked from commit 54baa89690f61101c8182cd4fed2177941476587)
    • Edgar Cherkasov's avatar
    • Edgar Cherkasov's avatar
      drm/imx/dcss: add dcss_crtc_atomic_check call. · 62221f7d
      Edgar Cherkasov authored
      Add dcss_crtc_atomic_check into dcss_helper_funcs, otherwise
      CRTC will not be disabled after eDP plug out.
      As result DSI bridge will not be disabled and after eDP plug in
      there are no picture on display.
      DSI brifge (nwl-dsi) must be disabled, otherwise DSI data will
      not be handled properly by DSI-to-eDP sn65dsi86 bridge.
      dcss_crtc_atomic_check call in the same manner as drm_simple_kms_crtc_check.
  6. 30 Sep, 2020 2 commits
    • Edgar Cherkasov's avatar
      drm/bridge: ti-sn65dsi86: perform soft reset on loss of DP sync · a043e399
      Edgar Cherkasov authored
      Soft-resetting the chip by SOFT_RESET (0x09) register if
      LOSS_OF_DP_SYNC_LOCK_ERR error has been occured.
      It fixes the occasional "no image" issue after display hot plug.
    • Edgar Cherkasov's avatar
      drm/bridge: ti-sn65dsi86: set VSTREAM_ENABLE after drm_panel_enable · c260fb6d
      Edgar Cherkasov authored
      Setting VSTREAM_ENABLE after drm_panel_enable with 500ms delay
      to reduce the amount of LOSS_OF_DP_SYNC_LOCK errors.
      This error is supposed to occur due to race condition between
      sn65dsi86 bridge and nwl-dsi drivers.
      In addition, the error occurs only after reconnection of the DP
      display, first connect does not cause this error.
      Delay length was determined by experiments with AOC I2475PXQU display.
  7. 28 Sep, 2020 2 commits
  8. 23 Sep, 2020 1 commit
  9. 22 Sep, 2020 3 commits
  10. 14 Sep, 2020 1 commit
  11. 09 Sep, 2020 1 commit
  12. 08 Sep, 2020 10 commits
  13. 31 Aug, 2020 1 commit
  14. 27 Aug, 2020 1 commit
  15. 26 Aug, 2020 2 commits
  16. 25 Aug, 2020 1 commit
  17. 24 Aug, 2020 1 commit
  18. 19 Aug, 2020 1 commit
  19. 17 Aug, 2020 1 commit
  20. 14 Aug, 2020 1 commit
  21. 13 Aug, 2020 1 commit
  22. 12 Aug, 2020 1 commit