- 04 Feb, 2021 2 commits
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Thomas Schäfer authored
- LPDDR4 manual de-rate workaround set to Option 2 for 4 GiB and 2 GiB memory variants. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- If total memory amount is 3 GiB or less, PHYS_SDRAM_2 memory range is not used. Enable setup of memory range only if PHYS_SDRAM_2 is defined. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 26 Jan, 2021 1 commit
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Thomas Schäfer authored
- When video_off ist set set to 'yes', some initialization routines in video_link driver are not executed during u-boot startup sequence. As a consequence, linux DP support will fail. Set 'video_off=no' to fix this. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 22 Jan, 2021 1 commit
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Thomas Schäfer authored
- Move 'boot_scripts' definition _behind_ the BOOTENV, otherwise this will overwrite 'boot_scripts' variable with its own definition. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 15 Dec, 2020 1 commit
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Thomas Schäfer authored
Detection of HW variant before iomux fixup for L120 failed. As a result iomux fixup is skipped. Fix this. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 09 Dec, 2020 2 commits
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Thomas Schäfer authored
- ramdisk_addr_r is required by distroboot spec. - pxefile_addr_r is required by distroboot spec. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- add eMMC boot description. - add bootloader update package description. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 20 Nov, 2020 2 commits
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Thomas Schäfer authored
Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 17 Nov, 2020 3 commits
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Thomas Schäfer authored
- There are some boot messages during DDR and MMC initialization which are superfluous for normal boot. Convert them to debug messages. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- Remove 'legacy_boot' from bootcmd and clean up related boot scripts in default environment. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- Add 'vsync-active' and 'hsync-active' properites to make sure that polarity of the SYNC signals can be reflected in dtb. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 13 Nov, 2020 3 commits
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Thomas Schäfer authored
- Display configuration is set up in device tree now. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- Resolution 1920x1080 @60Hz seems to work stable on tested HDMI displays. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- Enable CONFIG_DM_VIDEO instead of CONFIG_VIDEO. - Remove SPLASH_SCREEN as some display resolutions cannot be configured properly for HDMI displays. - Enable CMD_BMP to allow for displaying graphics on HDMI screen. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 11 Nov, 2020 3 commits
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Thomas Schäfer authored
- add 'board_phys_sdram_size' function to calculate the total amount of memory appropriately. - set PHYS_SDRAM_SIZE to the maximum possible value of 0xC0000000 (3 GiB) - remove 'PHYS_SDRAM_2_SIZE' from board config file. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- Add support to test available memory. - Add test configuration for 2 GiB variant. - Use BRD_REV0 and BRD_REV1 signals to detect memory variant of the module. Currently, 2 GiB and 4 GiB memory variants are supported. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- Current implementation requires that memory size is configured using PHYS_SDRAM and PHYS_SDRAM_2 settings depending on actual memory size in the board config file. As PHYS_SDRAM_2 memory area is not used if total memory size is < 3 GiB, cache and MMU setup would use wrong values when initialized. Thus, dynamic initialization of 4 GiB and 2 GiB modules is not possible with one single bootloader binary. - Add support to determine actual memory size using the 'board_phys_sdram_size' function and calculate size of DRAM1 and DRAM2 regions accordingly. Fix cache enable setup to use detected size of memory areas instead of fixed config values. - Ensure that memory regions are set up properly even if OPTEE memory region splits DRAM1 into multiple regions. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 10 Nov, 2020 2 commits
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Thomas Schäfer authored
- Add BRD_REV[3:5] GPIOs to support memory variants and later board revisions. - Add pitx_gpio_t struct for cleaner gpio init and request in 'board_gpio_init' function. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- Enable CONFIG_LOG in pitx-imx8m defconfig. - CONFIG_LOG support available in emb_eep driver so far. - Set pitx-imx8m log format to 'm' (=0x20): log message only. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 06 Nov, 2020 1 commit
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Thomas Schäfer authored
- convert messages and warnings to appropriate log calls Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 04 Nov, 2020 1 commit
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Thomas Schäfer authored
- GPIO5_IO08 and GPIO5_IO09 iomux settings for UART3 RTS/CTS lines on rev2 have been swapped erraneously. Fix this. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 03 Nov, 2020 3 commits
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Thomas Schäfer authored
Due to HW design errors in rev2, some signals must be reconfigured to avoid malfunction or possible electrical damage. - Setup UART3 RTS/CTS lines as GPIOs as polarity has been swapped on rev2 - Make sure to set GPIO1_IO12 (USB1_OTG_PWR) in input mode and remove usb0 port from u-boot device tree to avoid conflicting drivers when external host is attached. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- add USB1_OTG_PWR configuration - add USB1_OTG_OC configuration - add USB1_OTG_ID configuration Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- Due to an error in rev2 HW design, RTS/CTS of UART3 does not work. To prevent possible electrical damage, both lines are set up as GPIOs with appropriate settings. RTS/CTS flow control on UART3 is not available on rev2 modules. - Add setup for UART3 RTS and CTS lines. - Check hw revision and configure RTS/CTS as GPIO on rev2 modules. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 26 Oct, 2020 2 commits
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Thomas Schäfer authored
- add setup for UART3 RTS and CTS lines. - check hw revision and swap RTS and CTS lines for old rev2 modules. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- The IOMUX setting for pin ECSPI1_MISO__UART3_CTS_B is wrong as it writes 0 into the UART3_RTS_B_SELECT_INPUT register. This means that the UART3_RTS_B signal is assigned to ECSPI1_MISO pin instead of ECSPI1_SS0. Fix this. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 22 Oct, 2020 2 commits
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Thomas Schäfer authored
- use the 'update_pitx/update.scr' script for bootloader updates in emmc boot partition 0. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- read brd_rev gpio lines to determine board hardware revision - create human readable environment variable 'hw_rev' Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 21 Oct, 2020 1 commit
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Thomas Schäfer authored
- Current driver only allows to define a fixed timeout value in the board config file. - Extend 'imx_watchdog_init' parameter list with timeout value as received by 'imx_wdt_start' function. Calculate timeout value and write appropriate value into WCR register. - For legacy use, the fixed CONFIG_WATCHDOG_TIMEOUT_MSECS from board config is still evaluated. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 08 Oct, 2020 1 commit
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Dmitry Petrov authored
If a LVDS display is connected, but not powered, the LVDS display pulls the I2C signals low, when DSI_RST# is asserted. Signed-off-by:
Dmitry Petrov <dpetrov@dev.rtsoft.ru>
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- 06 Oct, 2020 3 commits
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Thomas Schäfer authored
- Set the LED_2_SEL bits [11:8] in DP83867IR LED Configuration Register 1 to 0b1011 (link established, blink on activity) from default value 0b0001. Same settings are configured for GBE1 PHY when I210/I211 is activated in linux. - This fixes KDP#81891 request for the pITX-iMX8M. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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Thomas Schäfer authored
- guard u-boot execution using i.MX8 CPU watchdog Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- sync with EVK settings - reorder to match Kconfig structure Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 05 Oct, 2020 4 commits
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- 23 Sep, 2020 1 commit
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Thomas Schäfer authored
- During merge to imx_v2020.04_5.4.24_2.1.0 branch the '&usb_dwc3_1' node reference was duplicated in the pitx-imx8m device tree. As a result, USB port 1 support was broken. Fix this and remove superfluous usb_dwc3_1 reference. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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- 18 Sep, 2020 1 commit
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Thomas Schäfer authored
- Fix struct definitions from new u-boot Environment data structure were renamed in v2020.04. Fix environment env_entry structure definitions. - Remove memory setup functions Memory setup functions 'dram_init', 'get_effective_memsize' and 'dram_init_banksize' are defined within mach-imx specific memory driver and thus removed here. - Fix some device node names Some device nodes are renamed in underlying dtsi files. Fix references to these nodes. - Fix SPL build fix include files used fix PMIC configuration settings to allow build with PMIC support. Signed-off-by:
Thomas Schaefer <thomas.schaefer@kontron.com>
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