imx8mq: fix IO pinmux setting

- The IOMUX setting for pin ECSPI1_MISO__UART3_CTS_B is wrong as it
  writes 0 into the UART3_RTS_B_SELECT_INPUT register. This means
  that the UART3_RTS_B signal is assigned to ECSPI1_MISO pin instead
  of ECSPI1_SS0. Fix this.
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>

arch/arm/include/asm/arch-imx8m/imx8mq_pins.h

@@ -526,7 +526,7 @@ enum {
 		IMX8MQ_PAD_ECSPI1_MOSI__GPIO5_IO7                   = IOMUX_PAD(0x0460, 0x01F8, 5, 0x0000, 0, 0),
 
 		IMX8MQ_PAD_ECSPI1_MISO__ECSPI1_MISO                 = IOMUX_PAD(0x0464, 0x01FC, 0, 0x0000, 0, 0),
-		IMX8MQ_PAD_ECSPI1_MISO__UART3_CTS_B                 = IOMUX_PAD(0x0464, 0x01FC, 1, 0x0500, 0, 0),
+		IMX8MQ_PAD_ECSPI1_MISO__UART3_CTS_B                 = IOMUX_PAD(0x0464, 0x01FC, 1, 0x0000, 0, 0),
 		IMX8MQ_PAD_ECSPI1_MISO__GPIO5_IO8                   = IOMUX_PAD(0x0464, 0x01FC, 5, 0x0000, 0, 0),
 
 		IMX8MQ_PAD_ECSPI1_SS0__ECSPI1_SS0                   = IOMUX_PAD(0x0468, 0x0200, 0, 0x0000, 0, 0),