Commit 86888014 authored by Thomas Schäfer's avatar Thomas Schäfer
Browse files

pitx-imx8m: fix compile errors introduced after merge



- Fix struct definitions from new u-boot
  Environment data structure were renamed in v2020.04. Fix environment
  env_entry structure definitions.
- Remove memory setup functions
  Memory setup functions 'dram_init', 'get_effective_memsize' and
  'dram_init_banksize' are defined within mach-imx specific memory
  driver and thus removed here.
- Fix some device node names
  Some device nodes are renamed in underlying dtsi files. Fix
  references to these nodes.
- Fix SPL build
  fix include files used
  fix PMIC configuration settings to allow build with PMIC support.
Signed-off-by: Thomas Schäfer's avatarThomas Schaefer <thomas.schaefer@kontron.com>
parent 2fc4ed90
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2018 NXP
*/
&usb3_0 {
compatible = "simple-bus";
};
&usb_dwc3_0 {
compatible = "fsl, imx8mq-dwc3";
};
&usb3_1 {
compatible = "simple-bus";
};
&usb_dwc3_1 {
compatible = "fsl, imx8mq-dwc3";
};
......@@ -17,7 +17,7 @@
/* First 128KB is for PSCI ATF. */
/memreserve/ 0x40000000 0x00020000;
#include "fsl-imx8mq.dtsi"
#include "imx8mq.dtsi"
#include <dt-bindings/net/ti-dp83867.h>
/ {
......@@ -425,7 +425,7 @@
};
};
&qspi {
&qspi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
status = "okay";
......@@ -443,7 +443,7 @@
&uart3 { /* console */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
assigned-clocks = <&clk IMX8MQ_CLK_UART3_SRC>;
assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
status = "okay";
};
......@@ -473,23 +473,23 @@
status = "okay";
};
&usb3_0 {
compatible = "simple-bus";
status = "okay";
};
&usb_dwc3_0 {
compatible = "fsl, imx8mq-dwc3";
dr_mode = "otg";
hnp-disable;
srp-disable;
adp-disable;
usb-role-switch;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
status = "okay";
dr_mode = "host";
};
&usb3_phy1 {
status = "okay";
};
&usb3_1 {
compatible = "simple-bus";
&usb_dwc3_1 {
dr_mode = "host";
status = "okay";
};
......
......@@ -5,6 +5,8 @@
*/
#include <common.h>
#include <env.h>
#include <env_internal.h>
#include <malloc.h>
#include <errno.h>
#include <asm/io.h>
......@@ -21,7 +23,7 @@
#include <asm/mach-imx/boot_mode.h>
#include <asm/arch/clock.h>
#include <asm/mach-imx/video.h>
#include <asm/arch/video_common.h>
#include <video_fb.h>
#include <spl.h>
#include <power/pmic.h>
#include <power/pfuze100_pmic.h>
......@@ -30,7 +32,6 @@
#include <dwc3-uboot.h>
#include <i2c.h>
#include <search.h>
#include <environment.h>
#include "pitx-imx8m.h"
#include "../common/emb_eep.h"
......@@ -96,39 +97,6 @@ int board_postclk_init(void)
}
#endif
phys_size_t get_effective_memsize(void)
{
/* rom_pointer[1] contains the size of TEE occupies */
if (rom_pointer[1])
return (PHYS_SDRAM_SIZE - rom_pointer[1]);
else
return PHYS_SDRAM_SIZE;
}
int dram_init(void)
{
gd->ram_size = get_effective_memsize();
#if CONFIG_NR_DRAM_BANKS > 1
gd->ram_size += PHYS_SDRAM_2_SIZE;
#endif
return 0;
}
int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = get_effective_memsize();
#if CONFIG_NR_DRAM_BANKS > 1
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
#endif
return 0;
}
#ifdef CONFIG_OF_BOARD_SETUP
int ft_board_setup(void *blob, bd_t *bd)
{
......@@ -342,12 +310,12 @@ int board_usb_cleanup(int index, enum usb_init_type init)
#ifdef CONFIG_CMD_KBOARDINFO
char *getSerNo (void)
{
ENTRY e;
static ENTRY *ep;
struct env_entry e;
static struct env_entry *ep;
e.key = "board_serial";
e.data = NULL;
hsearch_r (e, FIND, &ep, &env_htab, 0);
hsearch_r (e, ENV_FIND, &ep, &env_htab, 0);
if (ep == NULL)
return "na";
else
......
......@@ -18,9 +18,10 @@
#include <asm/arch/clock.h>
#include <asm/mach-imx/gpio.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <fsl_esdhc.h>
#include <fsl_esdhc_imx.h>
#include <mmc.h>
#include <spl.h>
#include <hang.h>
DECLARE_GLOBAL_DATA_PTR;
......
......@@ -4,15 +4,18 @@ CONFIG_SYS_TEXT_BASE=0x40200000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x400000
CONFIG_DM_GPIO=y
CONFIG_TARGET_PITXIMX8M=y
# CONFIG_KEX_EEP_BOOTCOUNTER is not set
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL=y
CONFIG_SPL_TEXT_BASE=0x7e1000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
......@@ -26,6 +29,8 @@ CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_USB_HOST_SUPPORT=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_CMD_LICENSE=y
CONFIG_CMD_BOOTZ=y
......@@ -33,16 +38,14 @@ CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MD5SUM=y
CONFIG_MD5SUM_VERIFY=y
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_READ=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
......@@ -54,13 +57,13 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x42800000
CONFIG_FASTBOOT_BUF_SIZE=0x40000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_DM_MMC=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_FSL_USDHC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0x0
CONFIG_SF_DEFAULT_SPEED=20000000
# CONFIG_SPI_FLASH_BAR is not set
......@@ -74,10 +77,7 @@ CONFIG_DM_ETH=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPI=y
......@@ -87,19 +87,15 @@ CONFIG_DM_THERMAL=y
CONFIG_NXP_TMU=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
CONFIG_SDP_LOADADDR=0x40400000
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_IMX8M=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_VIDEO=y
CONFIG_VIDEO_IMX8_HDMI=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_SDP_LOADADDR=0x40400000
CONFIG_DM_VIDEO=y
CONFIG_VIDEO_IMX8M_DCSS=y
CONFIG_VIDEO_IMX8M_HDMI=y
CONFIG_OF_LIBFDT_OVERLAY=y
......@@ -22,6 +22,7 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_CMD_KBOARDINFO
/*#define CONFIG_CMD_MMC_RAW_ECSD*/
#define CONFIG_DM_PMIC
#endif
#ifdef CONFIG_USB_TCPC
......@@ -52,7 +53,6 @@
#define CONFIG_CSF_SIZE 0x2000 /* 8K region */
#endif
#define CONFIG_SPL_TEXT_BASE 0x7E1000
#define CONFIG_SPL_MAX_SIZE (148 * 1024)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
......@@ -71,14 +71,15 @@
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_MALLOC_F_ADDR 0x182000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#undef CONFIG_DM_MMC
#undef CONFIG_DM_PMIC
#undef CONFIG_PMIC_CHILDREN
#undef CONFIG_DM_PMIC_PFUZE100
#undef CONFIG_CMD_PMIC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
......@@ -90,7 +91,7 @@
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
#endif
......@@ -125,8 +126,6 @@
* Environment Settings
*/
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_OFFSET (64 * SZ_64K)
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
/******************************************************************************
......@@ -239,11 +238,7 @@
#define CONFIG_IMX_BOOTAUX
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
......@@ -252,10 +247,6 @@
#define FSL_QSPI_FLASH_SIZE (SZ_16M)
#endif
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_OCOTP
#define CONFIG_CMD_FUSE
/******************************************************************************
* I2C Configs
......
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