Commit 2259fde9 authored by Thomas Schäfer's avatar Thomas Schäfer
Browse files

pitx-imx8m: add memory variant support



- Add support to test available memory.
- Add test configuration for 2 GiB variant.
- Use BRD_REV0 and BRD_REV1 signals to detect memory variant of the
  module. Currently, 2 GiB and 4 GiB memory variants are supported.
Signed-off-by: Thomas Schäfer's avatarThomas Schaefer <thomas.schaefer@kontron.com>
parent 150c94b5
......@@ -8,5 +8,5 @@ obj-y += pitx-imx8m.o
ifdef CONFIG_SPL_BUILD
obj-y += spl.o
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o lpddr4_timing_2g.o
endif
This diff is collapsed.
......@@ -25,9 +25,47 @@
DECLARE_GLOBAL_DATA_PTR;
extern int board_gpio_init(void);
static phys_size_t get_memory_variant(void)
{
int variant = 0;
/* Initialize GPIO lines first */
board_gpio_init();
gpio_request(IMX_GPIO_NR(5, 0), "BRD_REV0");
gpio_direction_input(IMX_GPIO_NR(5, 0));
gpio_request(IMX_GPIO_NR(5, 1), "BRD_REV1");
gpio_direction_input(IMX_GPIO_NR(5, 1));
variant = (gpio_get_value(IMX_GPIO_NR(5, 0)) |
gpio_get_value(IMX_GPIO_NR(5, 1)) << 1 ) & 0x3;
switch(variant) {
case 3:
return SZ_4G;
case 2:
return SZ_2G;
default:
return SZ_4G;
};
}
extern struct dram_timing_info dram_timing_2g;
void spl_dram_init(void)
{
ddr_init(&dram_timing);
phys_size_t memsize;
struct dram_timing_info *timing;
memsize = get_memory_variant();
switch(memsize) {
case SZ_1G:
case SZ_2G: timing = &dram_timing_2g; break;
case SZ_4G: timing = &dram_timing; break;
default: timing = &dram_timing; break;
};
ddr_init(timing);
}
#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
......
......@@ -216,9 +216,14 @@
#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024)
#define PHYS_SDRAM 0x40000000
#if 1
#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR in DRAM1 region */
#define PHYS_SDRAM_2 0x100000000UL
#define PHYS_SDRAM_2_SIZE 0x40000000 /* 1GB DDR in DRAM2 region */
#else
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR in DRAM1 region */
#endif
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
......
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